Continual advances in semiconductor technology enable transformational products for artificial intelligence, machine learning, 5G, automotive, networking, cloud and edge compute applications. Ubiquitous connectivity, low latency and faster data rates enable billions of smart devices. These devices rely on advanced, low-power FinFET designs and state-of-the-art 2.5D/3D integrated circuit (IC) packaging technologies to deliver the required power, performance, area and reliability goals.

As designers adopt advanced process technologies and very dense 2.5D/3D packaging techniques, the impacts of an ever-growing set of physical effects need to be considered when verifying the performance and reliability of chips. Ansys has developed a broad and deep set of multiphysics products to accurately analyze power integrity, thermal, variability, electromagnetic, mechanical and other physics in a way that captures their complex interdependencies across the spectrum of chip, package and system to promote first-time silicon and system success.

System-aware IC power efficiency, power integrity and reliability

At the core of every electronics system is a chip that must meet multiple conflicting requirements, such as high performance, increased functionality, power efficiency, reliability and low cost. Ensuring the chip meets power efficiency, power integrity and reliability requirements as both a stand-alone component and within the electronics system calls for a system-aware chip design methodology. Ansys uniquely offers a suite of multiscale, multiphysics solutions to support a chip-package-system (CPS) design flow.

Ansys simulation and modeling tools offer you early power budgeting analysis for high-impact design decisions and foundry-certified accuracy needed for IC signoff. The Ansys semiconductor portfolio of power efficiency, power integrity and reliability solutions achieves ISO 26262 “Tool Confidence Level 1” (TCL1) certification. This certification enables automotive IC designers to meet rigorous safety requirements for ADAS and autonomous applications. Auto chip makers can leverage the Ansys PowerArtist, Ansys Totem and Ansys RedHawk family of multiphysics simulations for all ISO 26262 safety-related development projects at any Automotive Safety Integrity Level.

Elastic compute with distributed big data infrastructure

Chip complexity continues to increase to one billion instances and beyond, while the advanced silicon technology at 7nm/5nm and below demand ever finer accuracy with more detailed modeling. Ansys has responded by developing the Ansys SeaScape elastic compute infrastructure for use by RedHawk-SC and the other principal tools in the semiconductor portfolio. The SeaScape infrastructure is based on the big data approach to computation used in machine learning applications, in this case optimized for electronic design. It offers unlimited elastic compute and parallel processing for extremely high capacity and throughput. The flexible Python interface makes it easy to unify and analyze data from multiple physics in a single view.

Foundry-certified accuracy

Designing chips with advanced silicon processes has become hugely expensive, and first-time working silicon is a must. IC designers require the most accurate simulation solution and consider foundry certification the ultimate proof of accuracy. Ansys semiconductor solutions have been certified by all leading foundries since 2006.

Production-proven solutions

Our software has enabled thousands of successful tape-outs across multiple technology nodes, design styles and packaging technologies.


Big Data Elastic Compute Infrastructure for Ultrahigh Capacity and Throughput

Analyzing complex chips at high accuracy across multiple physics (IR-drop, thermal, EM, mechanical, etc.) is not practically feasible with traditional EDA data structures. By adopting the distributed and elastic compute infrastructure similar to that found in leading big data applications like Google Maps™, Ansys RedHawk-SC and other tools deliver a scalable methodology for the future.

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Flagship Products

  • RedHawk-SC Semiconductors Icon

    Ansys RedHawk-SC is the gold standard for semiconductor power integrity and reliability solutions. It accurately predicts chip power and noise using voltage drop simulation analysis for the entire power delivery network, from chip to package to board.

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  • Totem Semiconductors Icon

    Totem is a transistor-level power noise and reliability simulation platform for analog, mixed-signal and custom digital designs.

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  • PowerArtist Semiconductors Icon

    PowerArtist is the industry-leading comprehensive register-transfer-level (RTL) design-for-power platform to analyze, debug and reduce power early in the RTL stage for maximizing power savings.

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  • RaptorX Semiconductors Icon

    RaptorX is a novel pre-LVS electromagnetic modeling software with limitless capacity of its engine in combination with highly accurate results and blazing fast modeling times.

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  • RaptorH Semiconductors Icon

    Ansys RaptorH is the key to a comprehensive set of electromagnetic (EM) field solver modeling capabilities while maintaining the speed and capacity of the Ansys RaptorX engine for high-speed analog modules, advanced SoC designs and chip/package co-simulation.

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  • Pharos Semiconductors Icon

    Electromagnetic (EM) crosstalk identification software that enables IC designers to quickly and accurately uncover nets that are susceptible to EM crosstalk in their design.

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  • Exalto Semiconductors Icon

    Exalto is a powerful post-LVS RLCk extraction software that enables IC design engineers to accurately predict electromagnetic coupling effects during the sign-off phase.

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Featured Products

  • RedHawk

    RedHawk is the standard for power integrity and reliability solutions. It accurately predicts chip power and noise using voltage drop simulation analysis for the entire power delivery network (PDN), from chip to package to board.

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  • PathFinder

    Planning, verification and sign-off solution for IP and SoC

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  • Path FX

    SPICE accurate path-based timing tool to evaluate hundreds of thousands of timing paths in an SoC for delay and variance. It compliments existing STA signoff tools.

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  • VeloceRF

    An inductive device compiler and modeling tool for IC designers. It integrates with leading EDA platforms and provides accurate SPICE models, silicon-verified up to 110 GHz.

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