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Empower Innovation at IDEAS 2023 Digital Forum

ANSYS’ VIRTUAL USER CONFERENCE FOR ELECTRONICS, SEMICONDUCTORS AND PHOTONICS DESIGNERS

Join us for the IDEAS Digital Forum — a place to catch up on industry best practices and the latest semiconductor, electronic, and photonic design advances. IDEAS will explore future trends with keynotes from industry leaders and offer technical insights by expert chip designers from many of the world’s largest electronic and semiconductor companies.

Are you ready to empower innovation at this year’s IDEAS?

NOV 30, 2023 | 8 AM PST

SPONSORS

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FEATURED SPEAKERS

Agenda

Nov 30, 2023

TIME PST TITLE SPEAKER(S)
8:00 AM
8:15 AM
8:00 AM - 8:15 AM
Opening Keynote: Leveraging AI/ML for Engineering Simulation
Prith Banerjee
Chief Technology Officer, Ansys
8:15 AM
8:30 AM
8:15 AM - 8:30 AM
Keynote: Chiplets – How does EDA Eco System Need To Evolve?
Lalitha Immaneni
Vice President, Intel
8:31 AM
9:09 AM
8:31 AM - 9:09 AM
Technology Innovation Panel – How Leading Customers are Radically Rethinking Power Integrity Analysis and Breaking Through the Status Quo
Ed Sperling
Editor-in-Chief, SemiEngineering
Chip Stratakos
Partner, Physical Design, Microsoft
Mohit Jain
Principal Engineer, Qualcomm
Murat Becer
Vice President, Ansys
Thomas Quan
Director, TSMC
9:10 AM
9:30 AM
9:10 AM - 9:30 AM
Technology Keynote: 3D Thermal Challenges and the Way Forward
Murat Becer
Vice President, Ansys
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
SigmaDVD: Enabling breakthrough methodologies for IR prevention, analysis coverage, and accelerated design closure
Chip Stratakos
Partner, Physical Design, Microsoft
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
Novel CAD Methodology for IR Drop and Reliability Verification of Stacked Dies (3D-IC)
Matthew Jastrzebski
Engineer, Intel Corporation
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
High-Performance Design with Rapid RTL Profiling of Critical Power Scenarios
Alexander Pivovarov
SMTS, AMD
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
Laying the Foundations for Optical Pass-Through Links’ Design
Luca Ramini
Research Scientist, Hewlett Packard Labs
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
A Novel approach to cost-Efficient Hybrid Cloud Solutions with SeaScape's DataLake and Micro-Resiliency
Mohit Srivastava
Staff Engineer
9:30 AM
10:10 AM
9:30 AM - 10:10 AM
ML-Based Multiphysics OptimizationsFrom Concept to Applications
Jerome Toublanc
Business Development executive
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
A Multiphysics Simulation Flow for High Performance MMIC Products for 5G and RF Applications
Vittorio Cuoco
Senior Principal Modeling Engineer - Multiphysics Simulations Competence Manager, Ampelon
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
A Novel Methodology for EM/IR analysis of Complex LDO/Power Gated Designs
Pavan Bilekallu
Lead Engineer, Layout, Qualcomm India Pvt. Ltd.
9:30 AM
10:00 AM
9:30 AM - 10:00 AM
Accuracy and Performance benchmarks for Gate-level Power Integrity Signoff with RedHawk-SC Advanced Power Analytics
Love Gupta
Principal Design Engineer, NXP
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
Optimizing Power MOSFET Design with optiSLang AI/ML and Ansys Totem PMIC Utility
Mandar Deshpande
Technical Staff Engineer, CAD, Microchip Technology Inc.
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
Silicon Interposer Extraction Using Ansys RaptorX
Garth Sundberg
Senior Principal Engineer, Ansys
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
SigmaDVD: High Coverage Solution for Power Integrity Signoff
Anusha Vemuri
Physical Design Methodology Engineer, NVIDIA
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
Optimizing Ansys Redhawk-SC with AMD Over InfiniBand Interconnect
Andy Chan
Lead, Microsoft Semiconductor Community, Microsoft
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
A Comprehensive Thermal Solution in Advanced Large Scale 3DIC Design
Ping Ding
Backend Designeer, Sanechips
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
Graphics workload-based power trends and optimizations using PowerArtist
Sandesh Saokar
Graphics Hardware Engineer, Intel
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
Leveraging Scan Vectorless for ATPG Robustness
Mohit Jain
Principal Engineer, Qualcomm
10:00 AM
10:30 AM
10:00 AM - 10:30 AM
Revolutionizing Chip Design: Python-Powered Workflow with Gdsfactory and Lumerical-Ansys Integration"
Joaquin Matres
Photonics Engineer, Google X
10:10 AM
10:30 AM
10:10 AM - 10:30 AM
Early IR Drop Prediction Using Machine Learning for Power Grid
Anil D'Souza
CAD Engineer, Intel Technology Pvt Ltd
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
Optimizing Power MOSFET Design with optiSLang AI/ML and Ansys Totem PMIC Utility
Mandar Deshpande
Technical Staff Engineer, CAD, Microchip Technology Inc.
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
Revolutionizing Chip Design: Python-Powered Workflow with Gdsfactory and Lumerical-Ansys Integration"
Joaquin Matres
Photonics Engineer, Google X
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
Simulation Driven Enhancements to Photonic Integrated Circuit Devices in Tower’s PH18 Platform
Bowen Wang
Sr Staff, Tower Semiconductor
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
Synopsys/Ansys/Keysight RF Reference Design Flow on TSMC Advanced N4P Process
Keith Lanier
Technical Product Mgmt Director, Synopsys
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
Silicon Interposer Extraction Using Ansys RaptorX
Garth Sundberg
Senior Principal Engineer, Ansys
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
SPICE Validation of Dynamic Voltage Drops from SigmaDVD
Andy Hoover
Senior Principal Technologist
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
Thermal Aware Vectorless EM/IR Sign-off for Custom-IPs
Ayan Roy Chowdhury
Engineering Manager, Intel Technology India
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
An Accurate System-level Transient Droop Analysis Methodology for High Performance GPGPU Power Delivery Network
Yuanyuan Ling
Power Integrity Engineer, Iluvatar
10:30 AM
11:00 AM
10:30 AM - 11:00 AM
Accuracy and Performance benchmarks for Gate-level Power Integrity Signoff with RedHawk-SC Advanced Power Analytics
Love Gupta
Principal Design Engineer, NXP
11:00 AM
11:30 AM
11:00 AM - 11:30 AM
EMA3D Charge
Timothy McDonald
President, EMA
11:00 AM
11:30 AM
11:00 AM - 11:30 AM
Novel Hierarchical IREM Sign-off Flow Using ROM
Dongyoun Yi
Staff Engineer, Samsung Electronics
11:00 AM
11:40 AM
11:00 AM - 11:40 AM
Innovating Semiconductor Design with Ansys applications on AWS
Dnyanesh Digraskar
Principal HPC Partner Solutions Architect, AWS
11:00 AM
11:30 AM
11:00 AM - 11:30 AM
The tool certification process of Ansys RedHawk-SC Electrothermal: another successful collaboration with Ansys
Ki Wook Jung
Staff Engineer, Foundry Business, Samsung Electronics
11:00 AM
11:30 AM
11:00 AM - 11:30 AM
EPDA: Bringing Layout Awareness to Photonics Simulation
Gilles LAMANT
Distinguished Engineer, Cadence Design Systems Inc
11:00 AM
11:30 AM
11:00 AM - 11:30 AM
Early Clock Tree Power Correlation at SOC: A Case Study
Sri Sai Pavan Pasumarthi
Senior Engineer, Qualcomm
11:00 AM
11:30 AM
11:00 AM - 11:30 AM
Integrated IR shift-left solution in construction with RedHawk-Fusion
Kiran Adhikari
Hardware Engineer, Microsoft Corporation
11:30 AM
12:00 PM
11:30 AM - 12:00 PM
3DIC Compiler & RHSC ET
Kenneth Larsen
Director of Product Management and Marketing
11:30 AM
12:00 PM
11:30 AM - 12:00 PM
An Accurate System-level Transient Droop Analysis Methodology for High Performance GPGPU Power Delivery Network
Yuanyuan Ling
Power Integrity Engineer, Iluvatar
11:30 AM
12:00 PM
11:30 AM - 12:00 PM
Aggressor Aware Design for Improved IR-Drop Results
Vlad Berlin
Physical Design Engineer, Retym
11:40 AM
12:00 PM
11:40 AM - 12:00 PM
A Virtual Prototyping System for Silicon Carbide Power Modules
James Victory
Fellow, onsemi

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EXPERIENCE

IDEAS is an exciting and enriching platform for professionals in the field of chips, photonics, and electronics design. Listen to the innovative ideas and state-of-the-art experiences of your colleagues in the industry that have resulted in successful tapeouts. 

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