Comprehensive RTL design-for-power platform: analyze, debug, reduce
ANSYS PowerArtist is the comprehensive design-for-power platform of choice of all leading low-power semiconductor design companies for early RTL power analysis and reduction. PowerArtist enables you to perform physical-aware RTL power budgeting, interactive debugging, analysis-driven reduction, efficiency regressions and profiling of live applications, while also enabling a seamless RTL-to-physical methodology for power grid integrity.
Power efficiency is paramount in semiconductor design. RTL designers working on a variety of applications, from mobile and CPUs to networking and automotive ICs, use ANSYS PowerArtist to analyze and reduce power early in the development cycle for the highest impact. Compared to traditional gate-level methodologies, PowerArtist provides rapid turnaround on multimillion instance designs, and enables early power-related design decisions. In order for these early design decisions to be reliable, PACE (PowerArtist Calibration and Estimation) technology delivers consistent RTL power accuracy and identifies reduction opportunities through unique modeling of physical implementation, including clock tree and mesh networks, wire capacitance and glitch.
PowerArtist automatically identifies block and instance-level sequential and combinational power reduction opportunities across clock network, data path and memory architectures to meet aggressive power targets. Using a powerful interactive graphical debug environment, RTL designers (especially those new to power) can easily and efficiently debug power hotspots. PowerArtist’s clock gating and power efficiency metrics and TCL interface for custom queries enable rigorous tracking of power through regression methodologies.
PowerArtist provides industry’s fastest power profiling capability, which can analyze activity of live applications comprising tens of milliseconds within hours — several orders of magnitude faster than traditional approaches. In addition, PowerArtist’s activity streaming and critical-signal interfaces with emulators cut the time to power by an order of magnitude. Quickly isolating a power-critical subset from millions of RTL cycles of activity, PowerArtist generates a unique RTL Power Model that interfaces with ANSYS RedHawk and delivers a seamless RTL-to-physical power methodology for early power delivery network planning and sign-off.
- White Papers
- Optimizing Processor Power-to-Performance Ratios Using Early RTL Design-for-Power Methodology - Webinar
- Differential Energy Analysis for Improved Performance/Watt in Mobile GPU
- PowerArtist for Early RTL Power Analysis and Reduction
- Low-Power Design Analysis and Optimization for Mobile and High-Performance Computing Applications