Semiconductors

The new era of semiconductors will enable transformational products for artificial intelligence (AI), 5G, automotive, networking, cloud and edge compute applications. Ubiquitous connectivity, low latency and faster data rates will enable billions of more smart devices. These devices will rely on advanced, low power FinFET designs and state-of-the-art 3D integrated circuit (IC) packaging technologies to deliver the required power, performance, area and reliability metrics.

Multiphysics analysis is critical for enabling these cutting-edge electronics systems to work reliably throughout their lifetime. ANSYS empowers customers with multiphysics simulations to simultaneously solve power, thermal, variability, timing, electromagnetics and reliability challenges across the spectrum of chip, package and system to promote first-time silicon and system success. ANSYS simulation and modeling tools offer you early power budgeting analysis for high-impact design decisions and foundry-certified accuracy needed for IC signoff.

System-aware IC power efficiency, power integrity and reliability

At the core of every electronics system is a chip that must meet multiple conflicting requirements, such as high performance, increased functionality, power efficiency, reliability and low cost. Ensuring the chip meets power efficiency, power integrity and reliability requirements as both a stand-alone component and within the electronics system calls for a system-aware chip design methodology. ANSYS uniquely offers a suite of multiscale, multiphysics solutions to support a chip-package-system (CPS) design flow.

The ANSYS semiconductor portfolio of power efficiency, power integrity and reliability solutions achieves ISO 26262 “Tool Confidence Level 1” (TCL1) certification. This certification enables automotive IC designers to meet rigorous safety requirements for ADAS and autonomous applications. Auto chip makers can leverage ANSYS PowerArtist, ANSYS Totem and ANSYS RedHawk family of multiphysics simulations for all ISO 26262 safety-related development projects at any Automotive Safety Integrity Level.

Foundry certified accuracy

With the cost of designing and implementing a system-on-chip (SoC) ranging from $50 million to $200 million, first-time working silicon is a must. IC designers require the most accurate simulation solution and consider foundry certification as the ultimate proof of accuracy. ANSYS semiconductor solutions have been certified by all leading foundries since 2006.

Production-proven solutions

Our software has enabled thousands of successful tape-outs across multiple technology nodes.

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Flagship Products

  • RedHawk

    RedHawk is the standard for power integrity and reliability solutions. It accurately predicts chip power and noise using voltage drop simulation analysis for the entire power delivery network (PDN), from chip to package to board.

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  • Totem

    Totem is a transistor-level power noise and reliability simulation platform for analog, mixed-signal and custom digital designs.

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  • PowerArtist

    PowerArtist is the industry-leading comprehensive register-transfer-level (RTL) design-for-power platform to analyze, debug and reduce power early in the RTL stage for maximizing power savings.

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  • RaptorX

    RaptorX is a novel pre-LVS electromagnetic modeling software with limitless capacity of its engine in combination with highly accurate results and blazing fast modeling times.

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  • Exalto

    Exalto is a powerful post-LVS RLCk extraction software that enables IC design engineers to accurately predict electromagnetic coupling effects during the sign-off phase.

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Featured Products

  • PathFinder

    Planning, verification and sign-off solution for IP and SoC

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  • RedHawk-SC

    The next-generation SoC power integrity and reliability signoff platform - based on big data and elastic compute architecture - designed to enable sub-16nm design success.

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  • Path FX

    SPICE accurate path-based timing tool to evaluate hundreds of thousands of timing paths in an SoC for delay and variance. It compliments existing STA signoff tools.

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  • Variance FX

    Variation modeling tool for standard cells and custom macros. It creates both delay and constraint derates and .lib timing models for entire libraries in a matter of hours.

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  • Pharos

    Electromagnetic (EM) crosstalk identification software that enables IC designers to quickly and accurately uncover nets that are susceptible to EM crosstalk in their design.

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  • VeloceRF

    An inductive device compiler and modeling tool for IC designers. It integrates with leading EDA platforms and provides accurate SPICE models, silicon-verified up to 110 GHz.

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