Skip to Main Content

Ansys at DesignCon 2023    

Booth 748

Join us at DesignCon from January 31- February 2, 2023, at the Santa Clara Convention Center, Santa Clara, CA. Please stop by our booth, #748 for a simulation demonstration.

Simulation from Silicon to Satellite

For 5G, autonomous vehicles, smart products, homes, cities, and factories to become reality, the enabling electronics technologies must deliver unprecedented levels of reliability. With innumerable sensors, microprocessors, and communication components, engineers face immense product reliability and performance challenges. Engineering simulation plays a critical role in helping high-tech companies deliver innovative and reliable products that achieve and exceed their target performance, energy-efficiency, cost, and speed-to-market goals.

  • Check icon outline
    Optimize Power, Performance and Cost
  • Check icon outline
    Increase Product Reliability
  • Check icon outline
    Accelerate Innovation
Silicon to the city

Applications

High tech electronics systems are the backbone for disruptive transformations occurring in industries ranging from mobility to energy, to the fourth industrial revolution and in silico healthcare. Ansys delivers high-tech electronics simulation applications spanning from the scale of silicon in semiconductor design and fabrication, to thermal and electronic reliability in packages and systems to electrically large environments such as cities.

Sips & Simulation Happy Hour with Ansys

Please join us for drinks and bites at our Sips & Simulation happy hour at DesignCon. Let’s celebrate being back together again and have fun with a simulation game to win prizes. Of course, there are raffle prizes for showing up, but a little competition is always fun.

Date: Wednesday, February 1, 2023
Time: 5:00 PM – 8:00 PM
Location: Santa Clara Convention Center, Mission City Ballroom, M3

RSVP today to reserve your spot! 

Request an Invitation

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

DesignCon Schedule

Day 1 - 2/1/2023

TimePresentationSpeaker
11:30 AM Welcome to Ansys 2023.1
Come to the Ansys booth to learn about the new capabilities in 2023 R1. Ansys Electronics solutions continue to bring best-in-class technologies to address high performance PCB, 3D-IC, EMI/EMC, thermal, cabling, antenna and electromechanical design challenges. These challenges are overcome with significant advancements in 2023R1 by developing automated workflows, tools integrations, modeling and other leadership-reinforcing capabilities in electromagnetic simulation and computational Multiphysics.
Matt Commens, Senior Manager Product Management, Ansys
12:00 PMFull system EMC analysis of an EV powertrain
Technologies such as faster switching devices like SiC and new inverter designs to support faster rise time are required to improve the performance of new electric vehicles powertrain. As vehicles become progressively autonomous and more safety-critical functions are electrified, product engineers are counting on simulation to address electromagnetic interference (EMI) and electromagnetic compatibility (EMC) of large, interconnected electronic systems. In this presentation we will present how Ansys simulation technology is helping companies around the globe to slash development time and reduce EMC certification tests for electric vehicle powertrain.
Julaino Mologni, Senior Product Manager, Ansys
1:00 PMCutting Edge Analysis of 5G/6G RAN/EDGE Nodes
Come to our booth to learn how Ansys Software is being used to simulate the complete system analysis of Radio Access Networks (RAN) from a Multiphysics approach. We will show how Ansys is uniquely positioned to tackle the simulation of electrical, thermal, mechanical, and optical challenges of these complex systems, but also to optimize the performance.
Wade Smith, Manager, Applications Engineering, Ansys
2:00 PMUnified 3DIC Power and Thermal Integrity Analysis using Ansys RedHawk SC Platform and TSMC 3Dblox Architecture
Design complexity of modern-day multi-chip and 3DIC structures poses tremendous design/verification and analysis challenges. Assembling a complex chiplet system chip-by-chip opens doors to user errors such as missing/incorrect connections, shorted nets, disconnected paths, etc. TSMC 3Dblox architecture aims to address this issue. We present how ANSYS RedHawk-SC and RedHawk-SC-ET work smoothly with TSMC 3Dblox and provide an unparalleled flow for system level EMIR and Thermal analysis. Presented flows using these toolsets mitigate user errors through automation of critical and time-consuming steps in the assembly and analysis process. 3DIC multi-physics is a high priority among the EDA community and the collaboration between these two industry leaders goes a long way in addressing these challenges.
 Prakash Vennam, Director, R&D, Ansys
3:00 PMA Smart Digital Bridge to Seamlessly Connect ECAD and Simulation
Altium and Ansys have partnered to solve one of the most time-consuming and error-prone tasks in the product engineering process - communication between ECAD and Simulation.  What used to be import/export and manual communication is now a seamless connection via a bi-directional integration.  In this presentation, will discuss how this smart digital bridge enables PCB designers and simulation engineers to smoothly exchange data while continuing to work within their respective environments. You’ll see first-hand how this digital continuity throughout the product engineering process can reduce time-consuming and costly errors and ultimately accelerate electronic product development and time to market.
Joao Beck, Director of Enterprise Technical Marketing, Altium
4:30 PMAccelerating mmWave Design with Synopsys, Ansys and Keysight Reference Flow using TSMC N16FFC Process
Smartphone, automotive and IoT applications all demand 5G/6G wireless communication. This is driving the development of RF designs on leading-edge, high volume process technologies. Synopsys, Ansys and Keysight will present how they teamed up with TSMC to develop a millimeter wave (mmWave) design reference flow for the TSMC N16FFC process that streamlines the use of advanced CMOS technology for mmWave circuit designs.

We will describe how the mmWave design reference flow cuts design turnaround time using the Synopsys Custom Design Family which provides a modern, open ecosystem with best-in-class RFIC design tools from Ansys and Keysight for ElectroMagnetic (EM) design, extraction, and analysis.
 Keith Lanier, Synopsys
Corey Mathis, Keysight
Marc Swinnen, Product Management Director, Ansys

Day 2 - 2/2/2023

TimePresentationSpeaker
11:00 AM Evaluating Measurement-Simulation correlation for high speed serial links
We use simulation tools as a virtual prototype environment. A first step to gain confidence in the tool is to simulate something for which you know the answer. I will walk you thru a methodology to verify the performance of HFSS to simulate high speed serial link channels.
Prof Eric Bogatin, Professor, University of Colorado
11:30 AM Tackling Power Delivery Challenges using Chip Model Analyzer
CMA is a system simulator capable of analyzing a Power Delivery Network from its early stages up to a complete system with die models coming from RedHawk and Package/PCB models coming from SIwave or HFSS. This allows engineers to simulate more and earlier, without having to wait for external models coming in too late, and to simulate full systems, decreasing the chances of design failures.
Felipe Castro, Senior Application Engineer, Ansys
1:00 PM Advancing security verification for automotive ICs and Secure edge computing
This presentation provides a comprehensive introduction of side-channel analysis, including the common side channels that have been exploited by attackers and the general design countermeasures. Then I will present industry proven flows for fast and effective pre-silicon side channel leakage analysis (SCLA) with focus on physical level power and electromagnetic (EM) side channels. Finally, I will provide a demonstration of SCLA on a popular AES crypto design.
Lang Lin, Principal Product Manager, Ansys
2:00 PM Electronic Photonic Design Automation (EPDA)
We will give a brief introduction to integrated photonics, including a review of key applications, from datacoms to sensing and even quantum information technology. The integrated photonic ecosystem is supported by electronic photonic design (EPDA) workflows that have been rapidly maturing over the last decade. We will present some of the highlights of current EPDA workflows with a particular focus on photonic integrated circuit simulation, including electronic/photonic co-simulation and advanced statistical analysis. In addition, we’ll show how custom components can be simulated with physical solvers using direct links to layout and technology files to perform foundry-specific design optimization and parameter extraction for automated compact model creation and PDK development.
James Pond, Distinguished Engineer, Ansys Lumerical
3:00 PM

ML-augmented Simulation and Co-optimization for Electronics and Semiconductor Applications

Machine Learning technology has been extensively used across Ansys products especially for Electronics and Semiconductor applications. Ansys provides an open and extendable framework through PyAnsys on all tools to facilitate customers building customized ML applications. OptiSLang optimization tool can also be used with not only Ansys Multiphysics tools but also other companies' tools for an integrated co-optimization framework. We have also built customized ML applications for large input/output space problems such as fast thermal simulation on 3DIC which will be discussed in this talk as well."

Norman Chang, Ansys Fellow, IEEE Fellow, Chief Technologist of ESOBU, Ansys
4:00 PMMulti-Die System Design and Multi-Physics Analysis
This presentation highlights Synopsys’ multi-die system solution and our close collaboration with Ansys on the multi-physics requirements including electrical, thermal and mechanical analysis
Frank Malloy, Principal Product Engineer, Synopsys
5:00 PMAutoDesk - F360 SI ExtensionMatt Berggren, Director of Engineering for Fusion 360 Electronics at Autodesk, AutoDesk

Speakers

Matt Commens
Senior Manager Product Management, Ansys

Julaino Mologni
Senior Product Manager, Ansys

Wade Smith
Manager, Applications Engineering, Ansys

Prakash Vennam
Director, R&D, Ansys

Dr. Prakash Vennam is a RD Director with ESOBU in the Semiconductor team at Ansys. He has over 20 years of experience in the EDA industry and has been with Ansys for the last 15 years. Dr. Vennam leads the RedHawk-SC ElectroThermal product in the areas of Chip-centric Thermal, Power and Signal integrity focusing on 3DIC and multiphysics solutions.

Lang Lin
Principal Product Manager, Ansys

Dr. Lang Lin is a principal product manager of Ansys Inc. based in San Jose, California. He is dedicated into developing 3D-IC multiphysics simulation and security verification methodologies to worldwide semiconductor customers. Before joining Ansys, he worked for Intel Corp. as a design engineer. He has published 50+ technical papers and patents, served as reviewer, program committee or tutorial speaker of several IEEE conferences such as HOST, ICCAD, DAC and ASPDAC.

Keith Lanier
Product Management Director, Synopsys

Keith Lanier is a member of the Product Management team within the Synopsys EDA Group focused on Custom, Analog and Mixed Signal, and RF Design products. He received his BS Electrical Engineering degree from North Carolina State University in 1986 and MS Electrical Engineering degree from National Technological University in 1993.

Lang Lin
Strategic Partnerships Director, Keysight

Corey is the Director of Strategic Partnerships for Keysight’s PathWave Software Solutions business, responsible for building and managing a partner ecosystem for Keysight’s portfolio of design and simulation products. Corey has a BSEE from Union College, and an MBA from Boston University.

Marc Swinnen
Product Marketing Director, Ansys

Marc Swinnen is Product Marketing Director for semiconductor products at Ansys in San Jose, CA. Before joining Ansys, Marc was Director of Product Marketing at Cadence Design Systems and has worked in Marketing and Technical Support positions at Synopsys, Azuro, and Sequence Design, where he gained experience with a wide array of digital and analog design tools. Marc holds a Master’s in Electrical Engineering and a Master’s in Industrial Management from KU Leuven, Belgium and an MBA from San Jose State University, California.

Marc Swinnen
Professor, University of Colorado

Eric is a professor at the University of Colorado, Boulder, where he teaches undergraduate and graduate classes in circuit design, system engineering and signal integrity. 

Marc Swinnen
Senior Application Engineer, Ansys

Marc Swinnen
Director Ansys Customer Excellence, Ansys

Aaron Edwards received his BSEE from California Polytechnic State University in Pomona, CA. He joined Ansoft in 2000 as an Application Engineer for the company's suite of signal integrity analysis tools. After the acquisition of Ansoft by Ansys in 2008, Aaron was promoted to Technical Account Manager for the Electronics Business Unit. For that position, he managed the Cross-Regional Electronics Application Engineers who focused on sales and support to the largest SI companies in North America. In 2010, he began managing the Western Region Application Engineering team which works with the leading-edge high-tech companies to enable them to solve the most complex design engineering challenges using Ansys solvers. He is currently the Director of Application Engineering for North America.

Marc Swinnen
Distinguished Engineer, Ansys Lumerical

Marc Swinnen
Ansys Fellow, IEEE Fellow, Chief Technologist of ESOBU, Ansy

Norman Chang co-founded Apache Design Solutions in February 2001 and currently serves as Ansys Fellow and Chief Technologist of Electronics, Semiconductor, and Optics BU, ANSYS, Inc. He is also currently leading AI/ML and security initiatives at ANSYS. Prior to Apache, he lead a research group on the research of Power/Signal/Thermal Integrity of chipsets based on VLIW architecture at HP Labs. Dr. Chang received his Ph.D. in Electrical Engineering and Computer Sciences from University of California, Berkeley. He holds 23 patents and has co-authored over 60 technical papers and a popular book on “Interconnect Analysis and Synthesis” by Wiley-Interscience at 2000. He is currently in the committee for EDPS, ESDA-EDA and SI2 AI/ML SIG, and an IEEE Fellow.

Marc Swinnen
Principal Product Engineer, Ansys

Frank is a Principal Product Engineer at Synopsys focusing on multi-die system design implementation, verification flows and technologies.  Frank has previously worked in static-timing analysis, floorplanning, and low-power design with extensive experience in ASIC digital logic design. Frank holds a BS in Electrical Engineering from Villanova University.

Marc Swinnen
Director of Engineering for Fusion 360 Electronics at Autodesk

Matt began his career building high performance semiconductor test and validation processes for new materials validation in the telecommunications industry. Coupled with a love of software engineering, computational geometry, graphics & rendering and mathematics; Matt turned his passion for both the hard and soft sciences into a career in Design & Manufacturing software spanning 20+ years.