Overview
Memory access speeds are a performance bottleneck in today’s high-speed AI and HPC semiconductor designs. High Bandwidth Memory (HBM) in a 3D heterogeneous integrated (3DHI) system is the optimal solution to break through this “memory wall”. It can achieve data rates exceeding 1 TB/s, which is critical for AI and data center applications. However, integrating HBM with other chiplets on a single interposer brings significant Multiphysics integrity challenges. High power and local hotspots generate excessive heat, causing mechanical stress, performance degradation, and reliability issues for HBM in a 3DHI environment. This webinar will explore these multiphysics challenges and introduce innovative modeling and simulation solutions.
What attendees will learn
- Multiphysics challenges of integrating HBM in 3DICs
- Engineering goals for multiphysics analysis of HBMs
- HBM modeling techniques from prototyping to signoff
- ML-driven system co-optimization for HBM
Who should attend?
- IC/ Chip designers
- IC/ Chip methodology engineers
- 3DIC architects
- System engineer
Speakers
Lang Lin, Principal Product Manager