This hands-on course is designed for new or current Ansys CSM users who may want to refresh their skills or get training on the following topics:
- CSM flow overview
- Typical on-chip driven DDR system SI analysis, including IO Modeling.
- High-Speed 2.5D/3DIC Signal Integrity Flow, including high accuracy interposer Modeling.
- PI induced SI analysis flow, PI and SI co-analysis.
- Early design optimization flow with optiSLang metamodel.
- Basic understanding signal integrity analysis is expected.
SoC/system Engineers & Designers
Self-paced slide presentation and computer practical sessions to validate acquired knowledge. Emphasis is placed on tool background & methodology as well as workshops.