ANSYS electromagnetic simulation solutions are the gold standard for signal integrity, power integrity and EMI analysis. Shrinking timing and noise margins in PCBs, electronic packages, connectors and other complex electronic interconnects require a platform where engineers can simulate and design entire electronic products with all the necessary physics and system effects. ANSYS simulation technology for chip-package-board design allows you to evaluate electrical, thermal and structural behavior prior to build and test, enabling your design team to optimize system performance and achieve first-pass design success.
Visit us in Booth 745 to learn more.
Toshiba Electronic Device & Storage Corporation
Center for Semiconductor Research & Development
Wednesday, January 30 | 1:00 PM
Lead Application Engineer, ANSYS
Wednesday, January 30 | 4:00 PM
Principal Application Engineer, ANSYS
Thursday, January 31 | 1:00 PM
Staff Transceiver Technical Marketing Engineer, Xilinx
Modeling of Critical Crosstalk Paths for High Sampling Rate RF Direct Data Converters in a Programmable RFSoC
Thursday, January 31 | 4:00 PM
Visit the ANSYS booth to discover how our newest software capabilities solve core design challenges that speed the development of breakthrough innovations.
Signal Integrity, Power Integrity, EMI
ANSYS will feature new capabilities for signal integrity, power integrity and EMI analysis of semiconductors, electronic packages and PCBs, including:
- An automated, fast technique to identify potential EMI problems on a PCB prior to simulation.
- A new electromigration analysis to help identify board areas that could fail due to high current and high temperature effects.
- A new, powerful ANSYS HFSS simulation technique to solve for S-parameters of critical signal nets on PCBs containing 3D discontinuities. The S-parameters are seamlessly included as part of the ANSYS SIwave simulation for fast, efficient and accurate extraction for the entire PCB.
See demonstrations of advanced multiphysics capabilities that provide unprecedented design insight and ensure the reliability of your designs:
- EM-thermal coupled analysis considers PCB Joule heating and other thermal sources during the design process.
- Multiphysics chip-package-system analyses predict and prevent warping, separation and fracture.
- Accurate understanding of the heat sources within your PCB help you design effective cooling systems.
Chip-package co-simulation for 2.5DIC with HBM
See demonstrations of chip-package co-simulation for system-in-package designs featuring 2.5DIC with HBM and learn how
- ANSYS common connectivity protocol enables automatic and seamless connections between multiple dies, interposer and package that significantly improves usability and eases 3DIC setup and analysis.
- ANSYS chip models are generated and used for package and board level analyses for power, signal & thermal integrity signoff
- ANSYS comprehensive chip-package-system workflows enable AC and transient PDN analysis, power noise impact on timing analysis and concurrent power and thermal integrity analysis for 2.5DIC with HBM
Accelerating 5G Design Innovation Through Simulation
Attend this workshop to learn how ANSYS simulations can help you accelerate 5G design innovation across the spectrum of chip, package and system (CPS). Topics will cover simulation solutions for RF and antenna designs, electronics system reliability and chip-package-system co-analysis for power integrity signoff for advanced packaging technologies – 3DIC and WLP. Don’t miss this exciting opportunity to meet industry experts and get ahead in the race for 5G with ANSYS simulations.
|Date:||January 29, 2019|
|Time:||1:30 pm - 4:15 pm followed by a reception|
|Location:||Hyatt Regency, Santa Clara|
|Agenda and Registration will be available soon. Please check back for updates.|
Wednesday, January 30 | 8:00 AM - 8:45 AM | Ballroom E
Track 15. Machine Learning for Microelectronics, Signaling & System Design
Modeling of Critical Crosstalk Paths for High Sampling Rate RF Direct Data Converters Integrated in a Programmable RFSoC
Wednesday, January 30 | 2:00 PM - 2:40 PM | Ballroom G
Track 06. Applying Chip-to-Chip and Advanced PCB Design & Simulation Techniques