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ANSYS 19.2 Release Highlights

Substantial Semiconductor Power Savings through Thermal Simulation

Power electronics is the technology for efficient conversion, control and conditioning of electric energy from the source to the load. It enables the generation, distribution and efficient use of electricity and covers the gamut from the very high gigawatt (GW) power carried by energy transmission lines to the very low milliwatt (mW) power needed to operate a mobile phone. Smart power technology provides the interface between the digital control logic and the power load. Many market segments, such as home and office appliances, heating, ventilation and air conditioning, lighting, computers and communication, factory automation and controllers, traction, automotive and renewable energy can likely benefit from the application of smart power electronics technology. The estimated potential energy savings that can be achieved by introducing power electronics into systems is enormous: more than 25 percent of current worldwide electricity consumption, according to the European Commission of Information and Communication Technologies Program.

Three of the fundamental functions performed with this smart technology are power control, sensing/protection and interfacing. Power control is enabled by power devices and their drive circuits, and facilitates the handling of high voltages and/or currents. It’s also our main development focus at Coolstar Technology.

Temperature and air stream velocity map of Coolstar’s power management IC (in full power mode) with ANSYS Icepak CFD simulation.

Our efficient power management solutions are based on the vertical integration of proprietary devices, cutting-edge designs and customized passive components. The foundation of these solutions is our proprietary transistor. Its state-of-the-art device structure and unique processing technology simultaneously enable high efficiency, high frequency and high levels of integration. At the circuit design level, our design team’s innovative integrated circuits (IC) are pushing the limits of speed and power density.

Challenges

Power semiconductors have evolved to the level where packaging restricts the achievable performance of the final device. A package for a power semiconductor needs to remove heat, provide security insulation against the heatsink, conduct current and deliver electromagnetic and thermomechanical reliability. Developing solutions for these multiple requirements requires in-depth knowledge of application demands, materials and manufacturing processes, including heat transfer and thermal management.

Coolstar’s integrated solution — optimized with thermal simulation — addresses this complexity and offers many advantages. First, the sophisticated thermal design lowers thermal resistance, which increases the reliability and life expectancy of the package. Reducing thermal resistance also lowers system volume due to smaller heatsinks. Second, because more functions are included in the power semiconductor package, system costs can be reduced. Third, the precise electromagnetic design of the package enables higher switching slopes. Finally, lowering the working temperature of power devices and modules allows for the improvement and simplification of heat exchangers and cooling systems within power applications.

Icepak simulation results accurately predict Infrared (IR) measurement of actual IC temperature.

Thermal Model Setup and Calibration

As the size of the package decreases and complexity increases, it is increasingly difficult to continue the traditional practice of placing a thermal test chip in a custom package and testing it on a custom board conforming to JEDEC standards. The use of a thermocouple in a cold plate leads to an abundance of temperature recording errors, and often the lack of space hinders the mounting process. Embedding a thermal diode in the IC chip to measure die-level temperature is often not permissible with the power device application. The transient test method enables the accurate determination of the case temperature without the use of an external thermocouple, but its interpretation requires detailed thermal structural modeling.

Computer-aided design has thus become an essential tool to optimize our integrated circuit (IC) designs and analyze their thermal resistance via simulation. After evaluating many simulation solutions on the market, we selected ANSYS Icepak, obtained through the ANSYS Startup Program, to perform integrated thermal and electrical simulations at the transistor, circuit and system levels.

We built a detailed thermal model from an IC-plus-package layout — in accordance with the JESD51 standard for thermal test environmental conditions — with parts ranging in size from 1 micron to 107 microns. Using the power and flexibility of ANSYS Icepak, we incorporated various physical effects into the model, including the self-heating of the silicon material, the anisotropic thermal conductivity of the metal/dielectric interconnect layers, the emitted radiation and the natural/forced convection. Meshing was challenging due to the size of the objects. Yet, with the help from ANSYS customer support engineers, we were able to produce an accurate and computationally efficient computational fluid dynamics (CFD) simulation model. We calibrated the thermal model with a direct infrared (IR) microscopy measurement of the semiconductor IC junction temperature at various power levels. The simulation results and the actual IR measurement matched closely.

Detailed, thermal resistance simulation at transistor, metal interconnect and system-package level.

Optimized Performance

With our calibrated thermal model, we optimized our design iterations using design of experiment (DOE) simulations. The detailed temperature map from the Icepak model provided insight regarding the heat flux partition, the multiphysics effects resulting from the transistor layout, the interaction between the metal/dielectric layers, copper pillar and quad flat no-lead (QFN) frame and the significance of the thermal vias on the printed circuit board. Combining the various optimized design factors, we achieved 80 percent lower thermal resistance on one product (versus the current industry benchmark), which translated to an estimated operating temperature that was a 20 C to 30 C cooler.

Detailed thermal resistance simulation, including PCB thermal vias.

Icepak is now an integral part of our design and verification process, and helps us accelerate product development by many months. Together with ANSYS, we are helping to improve the energy efficiency of billions of smartphones and central processing units (CPU), and enabling them to run cooler and longer.

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