ANSYS Convergence Webinar Series 2013: ElectromagneticsOn-Chip Inductor Design and Optimization
Niklas Troedsson, Micrel
The explosive growth of wireless communications has generated tremendous interest in low-cost implementations of radio-frequency integrated circuits (RFICs). This technology requires integrating many components on to the chip, including planar inductors that consume a large portion of the chip area and thus present a number of design difficulties. This session presents a design methodology to study and optimize on-chip inductor geometries to achieve the highest Q factor and extract well-defined parasitics in deep-submicron CMOS processes.
Modeling Touch Screens
Robin Granger, Roke Manor Research Ltd
Many of today's handheld wireless devices feature touch-sensitive displays. Such screens typically incorporate thin films of a resistive material called indium tin oxide, which can cause considerable RF losses resulting in poor antenna efficiency — a factor that is rarely reported in literature. The impedance boundary feature of ANSYS HFSS has been used successfully to model this effect, permitting rapid evaluation of alternative designs. Results of simulations and measurements of a real wireless device are presented.