Thermoelectric Modeling of Microprocessor Socket Assemblies to Predict Current Carrying Capacity – A Parametric Approach

Higher microprocessor speeds and power have lead to higher contact pin currents during package testing. Intel, in collaboration with PADT, has developed a sophisticated, parametric microprocessor burn-in simulation tool using APDL scripts, Excel Macro’s, and the ANSYS optimizer. The unique programmatic construction of the thermo-electric model minimizes element count of a model containing a microprocessor package, contact pins, and a PCB. The contact pin construction technique captures critical details by importing IGES files and allows the user to specify contact area and tip resistivity as independent variables. This development tool captures Joule heating and 3D conduction effects throughout the global model. What-if scenarios and design exploration was performed in batch mode as most key parameters are input with a single text file. This simulation tool, correlated to test data, allows engineers to predict effects of burn-in temperatures and current on contact pins to prevent thermal degradation of testi hardware.
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