Modern electronic systems bring many benefits to consumers, delivering new levels of functionality and safety in automotive, aerospace, health care and other applications. Yet managing the complexity of these systems also presents a significant challenge to the companies verifying them. Verification with testing can consume a huge slice of the development costs, without providing full confidence that the software meets its safety requirements.
When it comes to safety-critical systems, all corner cases that may threaten system-level safety properties needed to be addressed. Formal verification allows you to express and assess safety requirements, and effectively find bugs early in the development process. System-level analysis can be mapped to the software, closing the gap created by introduction of complex algorithms.
In this webinar, Ansys and Prover Technology demonstrate how formal proof technologies, such as Ansys SCADE Suite Design Verifier, can:
Uncover unwanted behaviors early in the development process
Bring value to your verification activities and improve KPIs
Be applied to model-based approach
Francois-Xavier Dormoy, Lead Product Manager, Ansys
Olav Bandmann,Chief Technology Officer, Prover Technology