Two of the biggest challenges facing successful chip design today are limiting the power consumption through lower supply voltages and managing the complexity of advanced silicon processes at 7nm and below. Both of these trends introduce significantly more timing and performance variability on every transistor, making it difficult to ensure a design will work for all temperature, voltage and process conditions. Current voltage variability analysis requires multiple timing libraries, characterized at different voltages, with timing interpolation estimates between them.
Ansys Path FX brings a much more efficient, simple and accurate solution by using a single SPICE-based library characterization that is inherently able to include voltage variability, temperature variability, electrical overstress (EOS), clock jitter and other variables at full SPICE accuracy, without shortcuts.
Path FX has the capacity and speed to analyze thousands of critical paths and entire clock trees, to ensure comprehensive coverage and ensure a robust and reliable design that will not fail in silicon.