快速规格
简化和自动化完成整个电子架构的功能安全性分析——包括直至芯片级别。消除功能安全性分析中的任何不一致之处,并加快确认审查和评估。
Ansys medini analyze supports key safety analysis methods at various levels of a chip, ranging from IP Design of integrated components, up to SoCs and electronic boards.
Ansys medini analyze支持最佳实践工作流程,其以图形方式将半导体设计的特定区域与电子架构内的关键功能相链接。这使工程师在验证半导体组件的功能安全性时,能够分析和解决潜在的故障模式。工程师可以高效且一致地执行安全相关的活动,如FMEDA,并符合ISO 26262:2018第11部分等安全标准的要求。
简化和自动化完成整个电子架构的功能安全性分析——包括直至芯片级别。消除功能安全性分析中的任何不一致之处,并加快确认审查和评估。
Lorem Ipsum has been the industry's standard dummy text ever since the 1500s, when an unknown printer took a galley of type and scrambled it to make a type specimen book. It has survived not only five centuries
ZF Group Harmonizes and Accelerates Functional Safety Analysis with Ansys medini analyze.
According to Günter Gäbelein, Safety Assessor at ZF Friedrichshafen AG, “As a systems supplier for passenger cars, commercial vehicles, and industrial technology, ZF Friedrichshafen AG places great emphasis on agility and innovation. To support exciting developments like autonomous driving and electric mobility, our R&D process must be fast, cost effective, and technically precise. More and more projects are taking advantage of synergies provided by medini analyze. In a medium-size project, more than 300 hours of effort can be saved by the one-tool solution and the interfaces to third-party tools for architectures. ZF is a strong advocate for model-based engineering, and medini analyze helps to reduce the complexity of analysis for embedded systems."
Lorem Ipsum has been the industry's standard dummy text ever since the 1500s, when an unknown printer took a galley of type and scrambled it to make a type specimen book. It has survived not only five centuries
功能
借助用于半导体安全性的Ansys medini analyze,硬件设计人员和安全分析师之间可以无缝地交换IP设计。工程师可以推导硬件设计的基本故障率,根据设计数据(例如芯片面积、门级数量)自动确定故障分布,以及根据硬件设计开展FMEA、FMEDA和FTA分析。团队可以重复使用和修改以前设计中的FMEDA数据,并导出可配置的FMEDA结果数据,以便将安全性数据移交给集成商。
通过降低开发成本并加快产品上市进程,同时最大限度地提高创新和产品置信度,Ansys medini analyze可帮助企业获得显著的竞争优势
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