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Ansys at the 2025 Design Automation Conference

Booth #1421

Visit the Ansys booth to learn more about the latest multiphysics for Thermal Analysis, Power Integrity, Parasitics, and Electromagnetics applied to system and semiconductors, including digital, 3D-IC, and analog & mixed signal designs.

 

Date / Time:
June 23-25, 2025

Venue:
Moscone West
701 Howard St
San Francisco, CA, 94103

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Proven and comprehensive physics simulation from chip to system

Semiconductor designers are facing new challenges driven by rapid advances in manufacturing technology and evolving market demand: 

Shrinking Process Nodes – Advanced manufacturing  like gate-all-around (GAA) transistors and backside power distribution create new design concerns 

Increasing Signal Frequencies – Higher speeds for communication channels like UCIe, SerDes, wireless, and HBM3 introduce electromagnetic interactions to many more design types

Multi-Die 3DIC - As multiple chips are packed into ever smaller spaces, the multiphysics interactions explode and introduce designers to novel concerns like Thermal Management and Mechanical Integrity 

Ansys addresses all these concerns with proven and industry-leading multiphysics engines that cover a huge array of physics. Visit the Ansys booth to learn what is possible for leading edge design.

Highlights

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Key Semiconductor Highlights of 2025 R1

The semiconductor industry continues to evolve rapidly, with increasing demands for faster, more efficient, and power-optimized designs. At Ansys, we understand the challenges chip designers face in reducing time to market while controlling costs and improving performance. With the launch of 2025 R1, we’re excited to unveil groundbreaking advancements across our semiconductor product portfolio, delivering unprecedented speed, accuracy, and usability.

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Gate Resistance in IC Design Flow

The semiconductor industry is rapidly advancing, with an ever-growing need for faster and more efficient designs as technology nodes continue to shrink. At Ansys, we recognize the critical challenges faced by chip designers in optimizing gate resistance to enhance performance while minimizing delays. In our latest research, we explore how Ansys’ innovative solutions, including advanced parasitic extraction tools, enable more accurate modeling of gate resistance, delivering faster, high-performance IC designs for the next generation of semiconductor applications.

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Ansys On-chip thermal predictability with NVIDIA Modulus

Integration of NVIDIA Modulus AI framework with the Ansys SeaScape platform will enable engineers to easily build customized AI solutions that can improve designer productivity and quickly identify optimal design configurations.

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Workshops

High Coverage Sigma DVD and Hierarchical Power

High-Coverage SigmaDVD and Hierarchical Power Integrity Signoff

Dynamic voltage drop (DVD) is a challenge for designers at advanced nodes. Ansys has introduced SigmaDVD™ - a once-in-a-decade breakthrough technology - to radically improve DVD coverage. Enhanced hierarchical methodologies with a range of reduced order models (ROMs) dramatically reduce needed compute resources while maintaining full analysis accuracy.

Monday, June 23rd, 10:00 AM – 12:00 PM Register Here
3D IC Multiphysics

3D-IC Multiphysics

Multi-die designs have been adopted by leading companies for the many benefits they offer for integration density, cost, performance, and flexibility. However, they also present new challenges with complex multiphysics interactions in the areas of signal integrity (SI), power integrity (PI), photonics, and security that require new design solutions and analysis technologies.

Monday, June 23rd, 1:00 PM – 3:00 PM Register Here
Thermal Integrity Reliability

Thermal Integrity & Reliability

Some of the major new challenges facing 2.5D/3-IC designers are the complex thermal and structural integrity multiphysics interactions that have a profound impact on product reliability. Ansys provides proven thermal and mechanical physics engines for multi-die analysis, with links to system-level boundary conditions (HTC).

Monday, June 23rd , 3:00 PM – 5:00 PM Register Here
Advanced Power Integrity Closure Signoff

Advanced Power Integrity Closure & Signoff

Power integrity EMIR analysis remains a challenge as designs grow ever larger and advanced node physics increase the complexity of multiphysics interactions. Ansys provides a highly efficient analysis platform that is cloud-optimized for high-speed throughput with sophisticated analysis for shift-left early prevention.

Tuesday, June 24th, 10:00 AM – 12:00 PM Register Here
AI ML Diven Design Optimization

AI/ML-Driven Design Optimization

AI/ML has emerged as a powerful technique for achieving better system performance and super-charging designer productivity. Ansys has enabled AI solutions at multiple levels - both within the tools for more efficient multiphysics algorithms, and outside the tools for optimized system configuration.

Tuesday, June 24th, 1:00 PM – 3:00 PM Register Here
Analog Mixed Signal Reliability and Signoff

Analog & Mixed-Signal Reliability and Signoff

Analog design has become increasingly central as design frequencies increase and heterogeneous mixed-signal deigns become more common. Ansys provides a power suite of analog & mixed signal analysis capabilities including on-chip electromagnetics, electrostatic discharge (ESD), and advanced parasitic debug.

Tuesday, June 24th, 3:00 PM – 5:00 PM Register Here

SEE WHAT ANSYS CAN DO FOR YOU

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