HFSS 3D Layout Workshop

Full-Wave High Speed Signal Integrity Analysis with ANSYS HFSS 3-D Layout

August 2, 2017

11:00 AM - 2:00 PM (PDT)


2645 Zanker Road
San Jose, CA 95134

Verly Flores

Join ANSYS for a free hands-on “Lunch & Learn” that demonstrates the fully automated 3-D electrical layout interface enabled in ANSYS HFSS R18. As a complement to the traditional arbitrary 3-D CAD-based modeling interface, the ANSYS HFSS 3-D Layout interface is a significant productivity enhancement for IC Package and PCB designers. ANSYS HFSS 3-D Layout allows engineers to easily create fully parametric models and perform design studies of printed circuit boards (PCB), electronic Packages and custom integrated circuits. In addition, the built-in parametric interface enables design engineers to explore design alternatives and evaluate design trade-offs prior to fabrication.

The hands on exercises will demonstrate how to Perform a High-Frequency Signal Integrity simulation on a PCB and Package including:

  • Import board/package design file and choose nets to analyze
  • Validate stackup and Auto creation of ports, boundaries and setup solution parameters
  • Setup HPC options, solve the project and view Results

Please note that the hands-on session limits registration to 12 attendees.