DesignCon 2017

Join ANSYS at DesignCon 2017 as we celebrate the unveiling of our latest Chip-Package-System (CPS) design flow software — a new, revolutionary standard in automated end-to-end simulation for electronic systems design.

Engineering simulation is the key to ADAS, IoT and 5G

Today’s engineers are challenged to design modern electronic systems that operate at higher speeds, with lower power and greater functionality in an ever-shrinking footprint. But with the demand on the rise to design Advanced Driver Assistance Systems (ADAS), IoT, 5G and other high-performance digital systems, electronics designers now require more than just a good circuit simulation tool.   

Take your designs to the next level with ANSYS’ automated design flow. Now you can perform transient circuit simulation of ECAD and MCAD assemblies directly from a layout for full system verification. Maximize the power efficiency of your devices and accurately predict important electrothermal behavior and electromagnetic coupling within compact designs.

Visit us in booth 943 at DesignCon to learn how ANSYS solves highly complex electronic assemblies and automatically produces transient plots for TDR, eye diagrams and compliance reports. This first-in-the-industry design flow can perform DC analysis, map Joule heating to a mechanical solver, and then produce temperature profiles and associated mechanical deformation and stress maps.  It’s a chip-package-system solution that allows you to evaluate electrical, thermal and structural behavior, so your design team can optimize system performance prior to building and testing.


Cendes Zol

Zoltan Cendes, ANSYS

Founder, Ansoft

Turning Signal Integrity Simulation Inside Out
Keynote Talk
Tuesday, January 31, noon
Mission City Ballroom


Karthik Srinivasan

Karthik Srinivasan, ANSYS

Senior Manager

Active Power Noise Modeling Toward Design for EMI Compliance of IC Chips
Technical Talk
Thursday, February 2, 8:00 am
Ballroom B


Youngsoo Lee

Youngsoo Lee, ANSYS

Product Specialist

Performance Improvement by System Aware Substrate Noise Analysis for Mixed IC
Technical Talk
Thursday, February 2, 8:00 am
Ballroom E



Visit the ANSYS booth to discover how our newest software capabilities solve core design challenges that speed the development of breakthrough innovations.

Signal-Integrity, Power-Integrity and EMI
Use of an intelligent, integrated, chip-aware design flow process can dramatically streamline the innovation of new and existing electronic devices.  ANSYS provides a unique Chip-Package-System (CPS) design flow that leverages advanced modeling and proven simulator technologies to solve complex power integrity, signal integrity, EMI/EMC, ESD and thermal stress challenges. 

Learn how to integrate IC package layout, interposers, connectors, ribbon cables, flex cables and printed circuit board layouts, all within a single layout assembly.   This demonstration will focus on using the new ultra-fast Chip Package Analysis (CPA) solver available within ANSYS SIwave. The SIwave-CPA solver delivers fast and accurate extraction of power and signal nets on electronic packages.


Thermal Efficiency and Mechanical Reliability
It is critical for package and system designers to determine the thermal signature of their systems. When designing packages or PCBs, structural and thermal integrity affects both reliability and product lifecycle. Thermal impact on the package, especially from the IC, is a key driver for materials selection, cooling and form factor decisions that ultimately determine the size, weight and cost of the final product. 

Explore the use of ANSYS’ new automated thermal analysis tools in SIwave. This demonstration will reveal how the newest integrated automation methods can streamline EM-thermal coupled analysis while also simplifying the assessment of structural impact on the electronic package using the proven multiphysics capabilities of ANSYS Mechanical. 


Booth Presentations

ANSYS 3D Layout Assembly with 3D Components
Wednesday February 1, 1:00 pm

Fast Design and Performance Decisions for Automotive 3D-IC Package - Architectures
Wednesday February 1, 4:00 pm

Autonomous Vehicle Radar: Improving Radar Performance with Simulation
Thursday February 2, 1:00 pm

Bridging the Electro-Thermal Divide
Thursday February 2, 4:00 pm

Denis Soldo

Denis Soldo
Director of Application Engineering

Narayanan TV

Narayanan TV
Solutions Architect
Zuken, USA

Dr. Lawrence Williams

Dr. Lawrence Williams
Director of Product Management

Dr. Lawrence Williams

Dr. Steven Gary Pytel Jr.
Lead Product Manager – Electronics

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