Introduction to ANSYS HFSS 3D Layout for PCB
The ANSYS HFSS 3D Layout course for high-speed printed circuit board design focuses on layered structures using 3D Layout design type in HFSS and AEDT (ANSYS Electronic Desktop). This course is designed for new users and will cover: Layer stackup, Layout viewing, Choices of solvers, Ports, Padstacks and hierarchy.
Workshops include: Small differential via structures, Larger full-PCB structures and simulations and Subdesign cutouts from larger printed circuit boards. Plus, several workshops follow a realistic workflow from start to finish and include transient circuit simulation of EM (electromagnetic) models.
Know how to incorporate external models including IBIS models and HFSS connector models
Know how to configure circuits driving EM simulations hierarchically
Know how to set up ports and connections to solder balls and ground planes
Know how to set up FEM (finite element method) analyses in HFSS 3D Layout
No prior HFSS nor electromagnetic (EM) simulation is required, but any prior experience with HFSS EM simulation or ANSYS Designer RF circuit design, is helpful.
Knowledge of high-speed digital circuit design, including S-parameters, transmission lines, and differential parts, is highly recommended.
Knowledge of printed circuit board design, including vias, component reference designators, and layer stackups, is valuable.
Target Audience: Electronic engineers working with high-speed printed circuit board (PCB) design and signal integrity.
Teaching Method: Lectures and hands-on simulation workshops to develop familiarity and productive skill in using HFSS 3D Layout. A training certificate is issued on completion of the course.
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