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System-Aware Electrothermal Analysis for Next-Generation IC Packages

Today’s electronics industry is trending toward silicon scaling, increased functionalities, miniaturization and heterogenous integration. With these trends, electrothermal challenges are becoming more prominent than ever. Thermal issues impact performance and cause premature failure, leading to costly callback of products. To meet the increasing demand of high performance and ultra-low electronic device power requirements, organizations must adopt a holistic approach, which combines chip, package and system designs.

Traditionally, chip, package and system designs were done in isolation. Ansys’ chip-package-system (CPS) methodology models technology during each step of the design process, enabling cross-domain information sharing. This helps engineers avoid product overdesign by accurately predicting the combined system’s overall performance.

This webinar showcases Ansys’ CPS methodology. A dynamic case study will highlight how the methodology can help deliver insights into electrical, thermal and structural issues early in a product’s design stage.

  • Learn how to design for avoiding thermal runaway of IC.
  • Receive expert tips for on-chip sensor placement.
  • Discover how to perform dynamic voltage frequency scaling.

Speaker: Vamsi Krishna Yaddanapudi - Principal Application Engineer, Ansys





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