Course Overview
The Ansys HFSS 3D Layout course for printed circuit board design focuses on layered structures using the 3D Layout design type in HFSS and AEDT (Ansys Electronic Desktop). Designed for brand new users, this course covers layer stackup, layout viewing, ports, vias, simulation boundary extents, layout driven assembly, and hierarchy.
Workshops include a small differential via structure, a planar antenna array, an octagonal spiral inductor, a subdesign cutout from a printed circuit board with a BGA (ball grid array) mounted on it, and a realistic cell phone example.
Prerequisites
- No prior HFSS nor electromagnetic (EM) simulation is required, but any prior experience with HFSS EM simulation or Ansys Electronics Desktop RF circuit design, is helpful.
- Knowledge of high-speed digital circuit design, including S-parameters, transmission lines, and differential parts, is highly recommended.
- Knowledge of printed circuit board design, including vias, component reference designators, and layer stackups, is valuable.
Target Audience:
Electronic engineers working with layered structures such as planar filters, planar antennas, on-chip passive devices like spiral inductors, high-speed printed circuit board (PCB) design and signal integrity.
Teaching Method:
Lecture slide files, self-paced videos, and hands-on simulation workshops to develop familiarity and productive skill in using HFSS 3D Layout. A training certificate is issued on completion of the course.
Self-paced Learning:
Complete a class on your own schedule at your own pace. Scope is equivalent to Instructor led classes. Includes video lecture, workshops and input files. All our Self-Paced video courses are only available with an Ansys Learning Hub subscription. Register for a subscription using the tab below or contact training@ansys.com for more information.
