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Ansys HFSS 3D Layout Getting Started (Self-paced Learning Available)

Course Overview

The Ansys HFSS 3D Layout course for printed circuit board design focuses on layered structures using the 3D Layout design type in HFSS and AEDT (Ansys Electronic Desktop).  Designed for brand new users, this course covers layer stackup, layout viewing, ports, vias, simulation boundary extents, layout driven assembly, and hierarchy.   

Workshops include a small differential via structure, a planar antenna array, an octagonal spiral inductor, a subdesign cutout from a printed circuit board with a BGA (ball grid array) mounted on it, and a realistic cell phone example.

Prerequisites

  • No prior HFSS nor electromagnetic (EM) simulation is required, but any prior experience with HFSS EM simulation or Ansys Electronics Desktop RF circuit design, is helpful. 
  • Knowledge of high-speed digital circuit design, including S-parameters, transmission lines, and differential parts, is highly recommended.
  • Knowledge of printed circuit board design, including vias, component reference designators, and layer stackups, is valuable.

Target Audience 

Electronic engineers working with layered structures such as planar filters, planar antennas, on-chip passive devices like spiral inductors, high-speed printed circuit board (PCB) design and signal integrity.

Teaching Method

Lecture slide files, self-paced videos, and hands-on simulation workshops to develop familiarity and productive skill in using HFSS 3D Layout.  A training certificate is issued on completion of the course.

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Learning Pathway

ansys-hfss-3d-layout-getting-started.png

Learning Outcome

Following completion of this course, you will be able to:

  • Place ports, vias, and connect solder balls to ground planes. 
  • Configure circuits driving EM simulations hierarchically 
  • Bring in external HFSS designs and position them in 3D Layout
  • Create output variables for calculated quantities like qualityfactor
  • Set up FEM (finite element method) analyses in HFSS 3D Layout
  • Generate and view results plots (post processing) of S-parameters

 Available Dates

Currently, no training dates available

Learning Options

Training materials for this course are available with an Ansys Learning Hub Subscription. If there is no active public schedule available, private training can be arranged. 

Self-paced Learning 

Complete a class on your own schedule at your own pace. Scope is equivalent to Instructor led classes. Includes video lecture, workshops and input files. All our Self-Paced video courses are only available with an Ansys Learning Hub subscription.

Agenda 

This is a 1 day self-paced course with videos covering most lecture content and workshop steps.

Modules

  • Module 1 - Introduction

  • Lecture: Introduction to HFSS 3D Layout in AEDT
  • Workshop 1.1: Connector on Board with FEM solver
  • Workshop 1.2: SSN with SIwave solver
  • Workshop 1.3: Planar Antenna Array with MoM solver 

  • Module 2 - Viewing and Visibility

  • Lecture: HFSS 3D Layout Viewing and Visibility
  • Workshop 2.1: Differential Via Trace Layer

  • Module 3 - Solution Setup

  • Lecture: HFSS 3D Layout Solution Setup
  • Workshop 3.1: Octagonal Spiral Inductor

  • Module 4 - Ports 

  • Lecture: HFSS 3D Layout Ports
  • Workshop 4.1: Ball Grid Array Subdesign Cutout

  • Module 5 - Extents

  • Lecture: Simulation Boundary Extents
  • Workshop 5.1: 62mil FR-4 Microstrip Extents

  • Module 6 - Hierarchy and Circuits

  • Lecture: Simulation Hierarchy Circuit Simulation
  • Workshop 6.1: Differential Via Eye Diagram Circuit
  • Workshop 6.2: Differential Via TDR Circuit

  • Module 7 - Layout Driven Assembly

  • Workshop 7.1: 5G Cell Phone