One of the biggest challenges of consumer electronic device durability is to survive in accidental impact and drop-induced-shock. Understanding the damage of shock at the module level can be helpful in identifying design or material issues early in product design. When dropped, all components are exposed to impact and/or shock, for example:
Impact/shock at circuit board level, causing damage to solder joints and/or adhesives
Impact on glass and fragile components, causing damage and shattering
ANSYS enables drop/impact/shock modeling through a user-friendly graphical user interface. From the analysis, a user can predict whether a design can pass impact or shock requirement.
Join Ansys for a free, hands-on “Lunch & Learn” workshop focusing on drop and shock analysis using Ansys LS-DYNA. In this workshop, we will discuss critical explicit dynamics concepts and demonstrate how to set up the following impact and shock analysis modelsthrough the Workbench LS-DYNA graphical user interface:
Circuit board drop test model
Glass impact failure model
Board level shock test model per JEDEC standard
Please register early to reserve your spot. Lunch will be provided.