Join ANSYS for a free hands-on “Lunch & Learn” workshop focusing on the fundamentals of simulating a printed circuit board (PCB) to scan trace characteristic impedance and determine near end (NEXT) and far end (FEXT) crosstalk violations for all nets on a board. Learn the latest techniques on how to apply field solvers coupled with transient circuit simulation to compute eye diagrams and study the impact of simultaneous switching noise (SSN) for standard memory interfaces such as DDR4.
This seminar will include hands-on exercises to demonstrate how to:
- Analyze a PCB using SIwave
- Perform an Impedance Scan of selected nets on the board
- Perform a Crosstalk Scan of selected nets on the board
- Create schematic for DDR4 channel for a transient circuit simulation (optional)
- Compute eye diagrams and validate the DDR4 channel performance using Virtual Compliance based on JEDEC standard (optional)
Please register early to reserve your spot. Lunch will be provided.