The availability of ubiquitous data and compute power to solve seemingly unsolvable problems is driving the artificial intelligence (AI) revolution in high tech today. Semiconductor chips for next-generation automotive, mobile and high-performance computing applications — powered by AI and machine learning algorithms — require the use of advanced 16/7nm systems-on-chips (SoCs), which are bigger, faster and more complex. For these SoCs, the margins are smaller, schedules are tighter and costs are higher. Faster convergence with exhaustive coverage is therefore imperative for first-time silicon success. A big data-enabled simulation platform that offers elastic scalability is required for enabling rapid design iterations to create a robust power grid design. Multivariable analytics and machine learning technologies are key for gaining valuable insights from the vast amount of simulation data to accelerate design closure.
In this webinar, leading semiconductor company Nvidia will discuss the limitations of traditional voltage drop analysis methodologies and share how ANSYS RedHawk-SC’s elastic compute scalability and powerful data analytics can be leveraged to accelerate next-generation SoC power integrity and reliability signoff. A new workflow using multivariable analytics, which considers grid criticality, timing criticality and simultaneous switching noise, is used for predicting the worst, local dynamic voltage drop (DvD) hotspots without running any transient simulation. This enables early detection of hotspots and offers feedback to the physical design team, making it possible to address design issues without impacting the tapeout schedule. The issues identified by this new flow were found to correlate well with vector-based dynamic voltage drop analysis with much faster turnaround time.
Kritika Garg, Nvidia
Currently working on IR drop signoff flow/methodology at Nvidia Corporation in Santa Clara, Kritika is an alumna of the University of Southern California with an M.S. degree in electrical engineering focused on digital VLSI system design and CAD. She has five years in the semiconductor industry, and previously worked as a block implementation design engineer with RTL-GDSII responsibilities at NXP Semiconductors (formerly known as Freescale Semiconductors) in India, and was a former intern in CAD methodology with the Silicon Engineering Group at Apple in Cupertino, California.
Sooyong Kim, ANSYS
Sooyong is a senior area technical manager with responsibilities for the new big data platform ANSYS RedHawk-SC and worldwide customer engagement. After joining Ansys in 2008 as part of Apache Design, he has held various positions in field operations. Previously, he worked at Cadence Design Systems and received a B.S.E.E. and a M.S.E.E. from Rensselaer Polytechnic Institute, Troy, New York.