More Music Less Noise

By Jacob Bakker, Consultant Physical Verification, NXP Semiconductors N.V., Eindhoven, The Netherlands

As automotive infotainment units become more complex, designers turn to simulation at the chip level to ensure reliable, noise-free performance.

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More Music, Less Noise

The integrated circuit board contains both analog and digital components that need to work together without disturbing each other.

Digital radios are becoming increasingly common accessories in automobiles, but their design poses a major challenge: The integrated circuit (IC) contains both analog and digital components that need to work together without disturbing each other. The power supply, external interfaces (USB, HDMI, VGA, etc.), radio signal receiver and sensor actuator are analog devices, while the data processing and memory storage units are digital. If they could be widely separated — for example, on two different ICs on one printed circuit board — then noise would not be a problem. But as designers continually compress components into smaller and smaller footprints to save space and cost, analog and digital signals are pushed closer together, increasing the chances of audible noise and sound disturbances coming from the radio.

NXP Semiconductors N.V. in Eindhoven, The Netherlands, is the world’s market leader in digital radio ICs for automobiles. As a global supplier, its products must be capable of decoding signals from all three major digital terrestrial radio standards that are popular in different parts of the world. Continuing a tradition of innovating complex electronics, the company recently produced a novel series of digital radio chips, dubbed SAF360x — integrating all three radios and up to six ICs into a single IC with a footprint that is 75 percent smaller and much more cost effective than its predecessor — using ANSYS Q3D Extractor and ANSYS RedHawk electronics simulation software to minimize analog–digital interference.


When radio frequency (RF) analog and digital baseband circuitry are combined on a single IC, the switching (from digital zero to one and vice versa) of the digital circuitry creates noise. Each switching event corresponds to a voltage swing between ground and the operating power-supply level. If too many transistor gates switch at once, voltage on the power supply grid drops and ground bounce occurs, which can propagate from the digital side to the analog through the common substrate of the IC, interfering with analog devices and reducing performance. In the case of the SAF360x, the radio’s sound quality could be impacted. The digital circuitry is referred to as the “aggressor” and the RF analog circuitry as the “victim.” In digital radio ICs, the digital components are usually responsible for about 90 percent of the noise, caused by millions of switching transistors. When the same IC has multiple RF circuitry integrated, the noise coupling problem is huge. Both the frequency of digital switching and the proximity of the digital to the analog components are major design criteria in these circuits.

The noise signals must propagate through some medium connecting the analog and digital sections of the IC to produce interference. Often the silicon substrate is the major contributor to the propagation path. The noise within the IC travels through the resistive interconnects, capacitive coupling between the transistor junctions, or through the substrate. At the package level, the inductive coupling from I/O bonding wires serves as a medium.

Noise propagation model
Aggressor–victim model of noise propagation in digital–analog IC chips
NXP block floorplan
IC block floorplan used for simulation by NXP engineers


Two approaches are used to minimize interference in these digital–analog ICs: passive isolation structures that act as shields to prevent noise transmission, and optimal design of both analog and digital circuits to minimize noise concerns from the start. Passive isolation structures like guard rings provide a low-resistance connection to the substrate, ensuring that the substrate is grounded at the location of the guard ring, thus making both analog and digital circuits less susceptible to noise; often multiple, parallel guard rings are needed. Deep N-well shields are another means of passive isolation, in which n-type (negatively charged) wells of material are implanted deep in the p-type (positively charged) substrate to minimize propagation of noise through the substrate. Optimal design involves practices that ensure that radio frequency and analog components are noise tolerant to begin with — perhaps through use of differential signals — and that digital circuits generate a minimum amount of noise when switching.

Once both of these approaches have been implemented (passive isolation and noise tolerance/noise minimization) to the best of the designer’s ability, the team tests the resulting noise profiles for each design using simulation. The engineers at NXP used an IC block floorplan consisting of two radio-frequency/analog tuners, a digital processing block, an analog-to-digital converter (ADC) and digital-to-analog converter (DAC) block, a processor unit block, and a package model for the simulation.

ANSYS RedHawk selects the worst power cycle automatically, so it is easy for engineers to see if their design meets specifications even in the worst-case scenario.

Simulation workflow
Extraction and analysis workflow for simulation
ANSYS RedHawk power cycle
RedHawk automatically selects the worst power cycle (indicated in red).
Natural digital switches
In use case 1 the digital switches were allowed to happen naturally, causing most switches to occur around 9,000 picoseconds.
Programmed digital switches
In use case 2, engineers programmed the digital processing unit to spread switching out over a wider interval of time, resulting in lower, more-uniform current spikes.

Using ANSYS RedHawk and ANSYS Q3D Extractor, NXP engineers designed a new IC chip for a digital automobile radio with a 75 percent footprint reduction, lower costs and superior sound quality.

Chip-Package-Methodologies for Reliable, Cost-Optimized ICs for Automotive and Embedded Applications
Chip-Package-Methodologies for Reliable, Cost-Optimized ICs for Automotive and Embedded Applications


Because the inductance (L) of the semiconductor package is important — the L di/dt effect is dominated by package inductance — NXP engineers used ANSYS Q3D Extractor to extract the package model for the analysis. They used CSE, the substrate analysis kernel for the solver engine, that is an add-on to ANSYS Totem. Inputs for the simulation included the tech file, which contains images of the metal layers, dielectric constants and other physical properties of the design; netlist, which describes how the IC components are assembled; GDSII layout, which contains the geometries; and substrate tech file, which contains the foundry-supplied substrate physical properties. Another input type was the digital block models contained in the RedHawk power library; for each digital cell, this model contains the current waveforms when the cell is switching as well as the effective series capacitance and resistance when the cell is not switching. Engineers then input the digital vector data in the voltage change dump (VCD) file to describe the switching of the actual cells being analyzed.

For each use case, 200,000 digital cells were included in the model. In the initialization step, all inputs were processed and formatted for RedHawk. Next, the power and ground (PG) network and substrate extraction were done to account for all propagation paths in the system. Finally, RedHawk performed the noise coupling analysis.

The simulation portion of this analysis took less than 60,000 MB and a maximum time of approximately 175 minutes.

Switching cells over time
Use case 1 (red plot) shows natural switching of the cells, with most of them occurring at about 9,000 picoseconds, causing a large current spike. In use case 2 (blue), cells that were preprogrammed to switch over a longer time interval result in a smaller current spike due to fewer cells switching simultaneously at about 22,000 picoseconds.
Case 1
Case 2
Programming the locations of switching cells (yellow) for two use cases can affect noise propagation to a small degree.


Noise maps and waveforms are the primary results of the simulation. ANSYS RedHawk Explorer displays the power profiles, showing average power over time, for all cycles of the simulation. RedHawk automatically selects the worst power cycle in the VCD file, so it is easy for engineers to see if their design meets specifications even in the worst-case scenario.

Simulation results helped to identify voltage drop scenarios in the system. Graphs of demand current and battery current over time reveal the spikes in current for two different use cases. Measuring the noise generated naturally by the IC and when the gate switching is preprogrammed to occur over a wider time interval gives engineers valuable optimization data.

The current spikes correspond well with the times when the most digital gate switches occurred. Spreading the gate switches out in time reduces the noise propagation level in the combined digital–analog IC chip.

The programming of digital circuitry also affects which gates switch by location on the IC. This can help to reduce the noise levels since the distance between the digital switching gate “aggressor” and the analog “victim” might change. This effect, however, is less prominent compared to the timing changes.

So what can be done to minimize noise propagation in a digital radio IC chip? Because engineers have a programmable digital block, they can control the number of cells that switch at a given time. By minimizing simultaneously switching circuits, they can reduce the current spike and, hence, the voltage drop in the system that leads to noise propagation from the digital side to the analog side of the IC.

Using ANSYS RedHawk and ANSYS Q3D Extractor, NXP engineers designed a new IC chip for a digital automobile radio with a 75 percent footprint reduction, lower costs and superior sound quality. But they are not stopping there. The team is already designing its next product, and with ever-shorter design times, it could be on the market in short order, helping NXP retain its position as global leader in ICs for digital automobile radio applications.

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