Acceleration of Design Closure and Sign-Off for 7-nm FinFET Technology

Venue:
Online via WebEx

Contact:
webinar@ansys.com

Industry-leading chip designers are moving to 7nm FinFET processes to produce chips with increased functionality and performance at a comparable power envelope, while at the same time improving engineering time and reducing cost. However, attaining these benefits isn’t easy — you must also address increasingly complex design issues that affect power integrity and reliability.

Register now for this webinar, where our experts will demonstrate how using the right simulation tools and methodology when designing 7nm FinFET-based chips can address difficult design constraints such as shrinking margins, large design sizes and complex reliability checks.