Anchor: A point at which part of a MEMS device is secured to the substrate to prevent part from moving etc. (see also Tether)
ASIC: Application Specific Integrated Circuit.
Behavioral Model: An efficient reduced order model characterizing the response of a device or system to a range of input excitations.
BGA:: Ball Grid Array: A style of chip package that sues an array of solder balls to achieve very high interconnect densities.
BioMEMS: MEMS systems with applications for the biological / analytical chemistry market. .
BioFlip:A Biological Chip, BioMEMSchip packaged using Flip chip technology.
CIF File: ASCII based 2-D layout file format used to transfer layout information between EDA tools, by Foundry to generate fabrications masks.
CMOS: Complimentary Metal Oxide Semiconductor: A type of integrated circuit / fabrication process based on insulated gate field effect transistors, similar to MOS, but uses complimentary MOS transistors to provide the circuits basic logic functions. The process layers from top to bottom are: Metal, insulating oxide, semiconductor. CMOS is finding many applications in surface micro machined MEMS fabrication.
CMP: Chemical Mechanical Polishing: A polishing process used to make the fabrication wafers as flat as possible.
Comb Drive: An electrostatic actuated MEMS device consisting of inter-digitated fingers similar to a comb. The comb has two halves, a fixed and a movable part. A potential difference applied across the two parts results in an attractive electrostatic force that pulls the combs together. Both linear and radial formats exist. They form the basis of inertial sensors and RF resonators.
CVD:: Chemical Vapor Deposition: A SEMICON process used to deposit material onto a wafer using chemical reactions on the wafer surface to modify the material during processing.
DARPA: The Defense Advanced Research Projects Agency. The central research and development organization for the Department of Defense (DoD). It manages and directs selected basic and applied research and development projects for DoD, and pursues research and technology where risk and payoff are both very high and where success may provide dramatic advances for traditional military roles and missions and dual-use applications.
Die: The square or rectangular section of a wafer onto which an single integrated circuit is fabricated.
Dimple: A small feature or bump, typically a raised square on the surface of a MEMS device. Dimple can be used as mechanical stops. e.g. to control the touch down in a high aspect ratio device.
DLP: Digital Light Processing. A micromirror display technology commercialized by Texas Instruments. Each image pixel in a large array is represented by an electrostatic driven MEMS Mirror. This reflective technology is far brighter than transmission LCD technology. Technology is widely licensed to conference display projector manufactures such as Proxima and InFocus.
DRC: Design Rule Checking: A process, typically fully automated by
the layout EDA software that check a layout for fabrication feasibility based
on a built in knowledge base.
DRIE: Deep Reactive Ion Etching. A fabrication technology that allows lower aspect ratio devices or deep features.
DXF: The AutoDEsk Drawing eXchange Format: A drawing format that is commonly used to transfer layout information between EDA tools, and by the Foundry to generate fabrications masks.
EDA: Electronic Design Automation. EDA is to an electronic engineer what CAE is to a mechanical engineer. Traditional EDA software providers are Cadence & Mentor Graphics.
Fab: Fabrication Facility. SEMICON industry term for a foundry.
FED: Field Emission Display: A display technology using arrays field emission tips.
FlipChip: A style of integrated circuit packaging that flips the chip over into another chip so that their functional surfaces are facing, and in close proximity to one another.
Foundry: The factory where the devices are manufactured. This is at the wafer level. Same as "Fab".
GaAs: Gallium Arsenide. An alternative semiconductor to silicon that is electronically faster, but more expensive and difficult to work with!
GDS II: 2-D mask layout Binary file format used file format used to transfer layout information between EDA tool, and by the Foundry to generate fabrications masks. There are two flavors, "Manhattan" where devices have edges composed of straight line, and "Boston" where devices can have true curves.
GLV: Grating Light Valve. A MEMS display technology. Incident light is reflected from each of multiple ribbon-like structures that represent a particular "image point" or pixel. The ribbons can move a tiny distance, changing the angle and attenuation of reflected light. Grayscale tones are achieved partly by varying the speed at which given pixels are switched on and off. The resulting image can be projected in a large auditorium with a bright light source or on a small appliance using low-power LEDs as a light source.
HARM: High Aspect Ratio MEMS. MEMS manufacturing techniques including surface micromachining that result in high aspect ratio geometry.
HDL: Hardware Description Language. Similar to SPICE, an efficient method of reduced order modeling electronic components and systems. HDL-A applies to Analog circuits.
HDL-A/MS: HDL applied to Analog / Mixed Signal systems. Also referred
to as VHDL-A/MS. The V prefix stands for VLSI.
Lab-on-chip: MEMS technology applied to analytical instrumentation. The instrument is reduced in size such that it fits onto one chip.
Lab-on-CD: MEMS / Microfluidic technology applied to analytical instrumentation. The resulting instruments fits onto a standard CD-ROM.
Lumped Parameters: Simple parameters describing a device such as a mass, spring constant, damping factor that can be used as an analytical representation of the real device. The parameters used in reduced order modeling.
M3S: Modular Monolithic MEMS. A fabrication process that enables both CMOS circuitry and MEMS to be created on the same chip.
MAP: Manifold Absolute Pressure. An automotive industry pressure sensor used to sense fuel injection inlet air pressures for 2-D and 3-D fuel mapping.
MEMS: Micro-Electro-Mechanical-Systems.
MEMS Pro: A PC based MEMS layout, design and simulation package marketed by MEMSCAP, originally developed by Tanner EDA.
Microfluidics: A general term for MEMS fluidic devices.
MicroFlumes: Micro Fluidic Molecular Systems. Micro / chip scale systems based on fluid-based protocols and operations, such as chemical/biochemical reaction, transport, synthesis, and engineering. Instead of relying on pumps, valves, filters, mixers, and tubes as system components in the standard sense, a MicroFlumes channel network may pump, mix, heat, separately, or perform other functions within the channel network itself. The key here is that control functionality is totally integrated in the channel itself.
MicroTiP: A single, field emission Tip used in FED display technology and fast cold cathode vacuum electronics. Derived from the tip used in a scanning –tunneling electron microscope.
MMIC: Microwave Monolithic Integrated Circuit.
MOEMS: Micro-Optical-Electro-Mechanical systems.
MOS: Metal Oxide Semiconductor: A type of integrated circuit fabrication fabrication process based on insulated gate field effect transistors originating from the VLSI industry. The process layers from top to bottom are: Metal, insulating oxide, semiconductor.
MST: Micro-System-Technology. A more general statement of MEMS including optical and fluidic systems. MST is a more common term than MEMS in Europe and Japan.
MTO: Microsystems Technology Office. DARPA's Microsystems Technology Office (MTO) focuses on the heterogeneous microchip-scale integration of electronics, photonics, and MEMS to produce a broad array of interface systems; sensors, sources, actuators, and displays; signal processors; and packaging and interconnect systems.
MUMPS: Multi-User MEMS Process. Foundry process & standard developed by Cronos. The process allow several device / system designs to be fabricated simultaneously on one wafer.
Nanotechnology: Technology involved with design and fabrication of devices and thin films with dimensions in the nanometer range (1E-9 m).
NMOS: Negative-Channel Metal-Oxide Semiconductor: A type of integrated circuit using n-doped semiconductors negatively charged) so that transistors function by the movement of electrons. In contrast, PMOS (Positive-Channel MOS) works by moving electron vacancies (holes). NMOS is faster than PMOS, but also more expensive to produce.
Polysilicon: Polycrystalline Silicon, used as the structural material for many MEMS devices.
PMOS: Positive channel Metal Oxide Semiconductor. (see NMOS).
PVD: Plasma Vapor Deposition: A SEMICON process used to deposit material onto a wafer by ionizing a gas plasma (typically via microwave radiation). In PVD chemical reactions occur in the gas/plasma phase, as opposed to on the surface of the wafer in CVD.
Q Factor: Quality factor. A measure of the sharpness of resonance of an electronic / electromechanical resonator component. A device with a High Q factor has a sharp, large magnitude, well defined resonance. It is defined as the ratio of the reactance to the effective series resistance of a component.
ROM: Reduced Order Macro Model.
Smart Matter: Another term for MEMS
SOI: Silicon on Insulator: A type of fabrication process where silicon is deposited on an insulating substrate. The process layers from top to bottom are: Semiconductor, insulator.
SPICE: Simulation Program for Integrated Circuits Emphasis. An Electronic Circuit simulator used to verify circuit designs and predict the circuit behavior.
SUMMit: Sandia Ultra Planar, Multi-level MEMS Technology. The Sandia MEMS fabrication process, consisting of a four-level polycrystalline silicon surface micromachining process. One ground plane/electrical interconnect and three mechanical layers. There is also a 5 layer version called SUMMit V.
Surface Micromachining: An additive fabrication technique which involves the building of a device on the top surface of a supporting substrate. This technique is relatively independent of substrate; therefore, it can be easily mixed with other fabrication techniques which modify the substrate first.
Technology File: A file that is normally paired with a 2-D layout file that describes the fabrication process steps required to achieve the 3-D finished MEMS or IC.
Tether: See anchor.
Thermal Actuator: An electro-thermally actuated MEMS device. A current passed though the device causes Joule (I2R) heating resulting in differential thermal expansion of the device, which can be used to extract a relatively large mechanical deformation.
T-Spice: A version of SPICE developed by Tanner Research Labs and part of MEMS Pro.
VLSI: Very Large Scale Integration:The fabrication technology for concentrating many thousands of semiconductor devices into a single integrated circuit. Strictly speaking VLSI is in the range of >10,000 transistors but less than 1,000,000 transistors.
ULSI: Ultra Large Scale Integration: The fabrication technology for concentrating > 1,000,000 transistors into a single integrated circuit.
Wafer:: The circular piece of silicon, sapphire or other substrate material onto which the MEMS & integrated circuits are fabricated. A wafer normally consists of multiple dies, one IC per die. Wafers are available in 4", 6", 8" and 12" (300mm) diameters.